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Bryant R., O'Hallaron D.R. — Computer Systems: A Programmer's Perspective
Bryant R., O'Hallaron D.R. — Computer Systems: A Programmer's Perspective



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Íàçâàíèå: Computer Systems: A Programmer's Perspective

Àâòîðû: Bryant R., O'Hallaron D.R.

Àííîòàöèÿ:

This book is a very unusual one because it explains computer architecture from the standpoint of the C/C++ programmer. That is, its object is to allow the programmer to understand how the architecture of the computer on which he/she programs effects the performance and execution of these programs. Things such as virtual memory, parallelization, optimization, and even logical and mathematical operations are effected by the architecture of the computer itself. For example - big endian versus little endian machines. You'd believe you wouldn't have to think about how your computer is organized at this level - that is one of the reasons you program in a high level language anyways, right? Wrong. If you have data stored in big endian format that is mathematically operated upon in a little endian machine, or vice versa, you will wind up with something quite different from what you intended. That's the kind of information this book gets into.Some have labeled this book as "hard". It really is not hard as much as it is densely packed with knowledge. You need to take each concept within each chapter and think about it before you go on to the next. If you do this you'll not only get much out of it during your initial read, you'll have a valuable reference for some time to come. To get the most of this book you should already be a capable C/C++ programmer and you should also know the building blocks of a computer. The book goes over these things very quickly but it really is not enough if you start out knowing nothing about these subjects. Highly recommended. The following is the proposed table of contents for the second edition:1 A Tour of Computer Systems 1I Program Structure and Execution 252 Representing and Manipulating Information 293 Machine-Level Representation of Programs 1454 Processor Architecture 3175 Optimizing Program Performance 4496 The Memory Hierarchy 531II Running Programs on a System 6197 Linking 6238 Exceptional Control Flow 6679 Virtual Memory 741III Interaction and Communication Between Programs 81910 System-Level I/O 82311 Network Programming 84712 Concurrent Programming 893A Error Handling 957A.1 Error Handling in Unix Systems 957A.2 Error-Handling Wrappers 959


ßçûê: en

Ðóáðèêà: Computer science/

Ñòàòóñ ïðåäìåòíîãî óêàçàòåëÿ: Ãîòîâ óêàçàòåëü ñ íîìåðàìè ñòðàíèö

ed2k: ed2k stats

Ãîä èçäàíèÿ: 2002

Êîëè÷åñòâî ñòðàíèö: 978

Äîáàâëåíà â êàòàëîã: 09.02.2014

Îïåðàöèè: Ïîëîæèòü íà ïîëêó | Ñêîïèðîâàòü ññûëêó äëÿ ôîðóìà | Ñêîïèðîâàòü ID
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Ïðåäìåòíûé óêàçàòåëü
Pointer, dereferencing      141
Pointer, example      141
Pointer, relation to array      38
Pointer, void *      38
Pointers      28 38 201—204
Pointers, bad, dereferencing      759—760
Pointers, creating      38—40
Pointers, declaring      33—34
Pointers, dereferencing      38—40
Pointers, examples of      141—142
Pointers, function      203
Pointers, function pointers      203
Pointers, underlying concepts      201
Pointers, use in C      202
Polluting a cache      598
Polluting cache      523
Pool of peer threads      862
popl [IA32] pop double word      139 140
popl [Y86] pop      260 287
popl [Y86] pop, ambiguous semantics      270—271
Port      804 815
Portable Executable (PE) format      543
Portable signal handling      631—633
Ports      804 815
Position-independent code (PIC)      570—574
Position-independent code (PIC), data references      572
Position-independent code (PIC), function calls      572—574
Positive overflow      70
POSIX      14
Posix, semaphores      878—879
Posix, standards      14 21
Posix, threads      862 863—884
Posix-style error handling      926
Posix-style error handling, wrappers      928—929
PowerPC, IBM and Motorola      256 264—265
Powers of two, dividing by      77—80
Powers of two, multiplying by      76—77
PP (physical page)      695
PPN (Physical Page Number)      704
PPO (Physical Page Offset)      704
preemption      595
Prefetching, in caches      522 522—523
Preprocessor      4 128
Preprocessor phase      4—5
Prethreading      882 882—885
Principle of locality      478
Printed circuit board      8
printf [C Stdlib] formatted print      5 37—38 566 603 702 725 778 783 795
Printing, formatted      37
Priority, forwarding logic      341
Priority, forwarding logic, write port      302
Private address space      595 595—596
Private area      725
Private copy-on-write      726
Private declarations (C++ and Java)      546
Private objects      725 725—726
Privileged instructions      596
Procedure calls, reducing      391—393
Procedure definition and call, example of      175
Procedure linkage table (PLT)      573
Procedures      170—180
Procedures, example      174—178
Procedures, procedure example      174—178
Procedures, recursive procedures      178—180
Procedures, register usage conventions      173—174
Procedures, stack frame structure      170—171
Procedures, transferring control      172
Process context      75 597
Process graph      603 874—876
Process graph, critical region      875
Process graph, limitations of      878
Process graph, safe trajectory      875—876
Process graph, unsafe region      875
Process graph, unsafe trajectory      875—876
process group      619
process id (PID)      600
Process scheduling      654—655
Process timers, accuracy of      660—663
Process timers, reading      659—660
Process-specific cycle timing      684
Processes      13—16 594
Processes, background      616
Processes, child      601
Processes, concurrent programming with      849—853
Processes, concurrent programs      851—853
Processes, context of      594
Processes, context switching      15
Processes, creating/terminating      600—605
processes, defined      15
Processes, foreground      616
Processes, group      619
Processes, parent process      600 601
Processes, preemption of      595
Processes, programs vs.      613
Processes, putting to sleep      610—611
Processes, reaping of      605
Processes, run state      600
Processes, scheduling of      597
Processes, stopped state      601
Processes, suspended      601
Processes, system call      15
Processes, terminated      601 605—606
Processes, waiting on sets of      606
Processes, zombie      606
Processing of operations, by the Execution Unit (EU)      402—403
Processor architecture      255—374
Processor architecture, hardware control language (HCL)      271—280
Processor architecture, hardware control language (HCL), HCL Boolean expressions      272—274
Processor architecture, hardware control language (HCL), HCL integer expressions      274—278
Processor architecture, instruction-set architecture (ISA)      255—374
Processor architecture, logic design      271—280
Processor architecture, logic design, combinational circuits      272—274
Processor architecture, logic design, word-level combinational circuits      274—278
Processor architecture, memory and clocking      279—280
Processor architecture, pipelining      309—317
Processor architecture, pipelining, computational pipelines      309—311
Processor architecture, pipelining, deep      314—315
Processor architecture, pipelining, limitations of      313—315
Processor architecture, pipelining, nonuniform partitioning      313—314
Processor architecture, pipelining, of a system with feedback      315—317
Processor architecture, pipelining, pipeline operation      311—313
Processor architecture, pipelining, pipelined Y86 implementations      317—358
Processor architecture, SEQ      280—308
Processor architecture, SEQ, and decode stage      291 300—302
Processor architecture, SEQ, and execute stage      291 302—303
Processor architecture, SEQ, and fetch stage      291 298—300
Processor architecture, SEQ, and memory stage      291 303—304
Processor architecture, SEQ, and PC update stage      304
Processor architecture, SEQ, and write-back stage      291 300—302
Processor architecture, SEQ, hardware structure      291—295
Processor architecture, SEQ, identifying computation steps in sequential implementation      294
Processor architecture, SEQ, organizing processing into stages      281—291
Processor architecture, SEQ, SEQ+ hardware      305—307
Processor architecture, SEQ, stage implementations      297—305
Processor architecture, SEQ, timing      295—298
Processor architecture, SEQ, tracing two cycles of execution by      297
Processor architecture, set membership      278
Processor architecture, Y86 instruction set architecture      258—271
Processor architecture, Y86 instruction set architecture, and physical addresses      259
Processor architecture, Y86 instruction set architecture, and virtual addresses      259
Processor architecture, Y86 instruction set architecture, byte-level encoding of the instructions      260
Processor architecture, Y86 instruction set architecture, comparison of Y86 and IA32 assembly programs      266
Processor architecture, Y86 instruction set architecture, condition codes      258
Processor architecture, Y86 instruction set architecture, constant word      261—262
Processor architecture, Y86 instruction set architecture, memory      258 260
Processor architecture, Y86 instruction set architecture, output of YAS assembler      268
Processor architecture, Y86 instruction set architecture, program registers      258
Processor architecture, Y86 instruction set architecture, programmer- visible state      258
Processor architecture, Y86 instruction set architecture, register file      260—261
Processor architecture, Y86 instruction set architecture, register identifiers (IDs)      260—261
Processor architecture, Y86 instruction set architecture, register specifier byte      261
Processor architecture, Y86 instruction set architecture, sample program      267
Processor architecture, Y86 instruction set architecture, unique interpretation of byte encodings      262
Processor control logic      905—923
Processor control logic, HCL Reference Manual      905—910
Processor control logic, HCL Reference Manual, expressions and blocks      906—908
Processor control logic, HCL Reference Manual, HCL example      908—910
Processor control logic, HCL Reference Manual, quoted text      906
Processor control logic, HCL Reference Manual, signal declarations      906
Processor control logic, PIPE      917—923
Processor control logic, SEQ      910—913
Processor control logic, SEQ+      914—917
Processor state      588
Processor table      597
Processor-memory gap      12 478
Processors      6—9
Processors, embedded      265
Processors, package      716
Processors, superscalar      396
Producer-consumer model      879 879—881
Product operation      43
profiling      437
Program code and data      16
Program counter (PC)      8—9 129
Program development      378
Program encodings      128—135
Program encodings, code examples      130—133
Program encodings, formatting      133—135
Program encodings, machine-level code      129—130
Program execution time      684
Program execution time, cycle counters      663—680
Program execution time, cycle counters, branch prediction      667—671
Program execution time, cycle counters, caching      667—671
Program execution time, cycle counters, context switching, effects of      665—667
Program execution time, cycle counters, IA32      663—665
Program execution time, cycle counters, K-best measurement scheme      671—680
Program execution time, experimental protocol      683—684
Program execution time, flow of time on a computer system      653—658
Program execution time, flow of time on a computer system, process scheduling and timer interrupts      654—655
Program execution time, future systems      684
Program execution time, interval counting      658—663
Program execution time, interval counting, operation      658—659
Program execution time, interval counting, process timers      659—663
Program execution time, K-best measurement scheme      671—680
Program execution time, K-best measurement scheme, implementation of      684—685
Program execution time, lessons learned      685—686
Program execution time, measuring      651—689
Program execution time, measuring, with cycle counters      665—680
Program execution time, process-specific cycle timing      684
Program execution time, time from application program's perspective      655—658
Program execution time, time-of-day measurements      680—683
Program execution time, variable rate clocks      684
Program memory      129—130
Program objects      28
Program performance and compilation system      6
Program performance optimization      377—454
Program performance optimization, Amdahl's law      379
Program performance optimization, branch prediction, and misprediction penalties      425—429
Program performance optimization, capabilities/limitations of compiler optimization      379—382
Program performance optimization, changing platforms      425
Program performance optimization, code profilers      379
Program performance optimization, converting to pointer code      412—415
Program performance optimization, eliminating bottlenecks      437—444
Program performance optimization, eliminating bottlenecks, Amdahl's law      443—444
Program performance optimization, eliminating bottlenecks, program profiling      437—439
Program performance optimization, eliminating bottlenecks, using a profiler to guide optimization      439—442
Program performance optimization, floating-point performance anomaly      423—425
Program performance optimization, improvement techniques      436—437
Program performance optimization, load latency      429—431
Program performance optimization, loop inefficiencies, eliminating      387—391
Program performance optimization, loop overhead, reducing      408—412
Program performance optimization, maximizing performance      378—379
Program performance optimization, memory performance      429—436
Program performance optimization, modern processors      395—408
Program performance optimization, modern processors, block diagram of      396
Program performance optimization, modern processors, functional unit performance      399—400
Program performance optimization, modern processors, overall operation      395—399
Program performance optimization, modern processors, processing of operations by the EU      402—403
Program performance optimization, modern processors, processor operation      400—408
Program performance optimization, modern processors, translating instructions into operations      401—402
Program performance optimization, optimization blockers      378 395
Program performance optimization, parallelism, enhancing      415—420
Program performance optimization, parallelism, limits to      421—423
Program performance optimization, parallelism, loop slitting      415—420
Program performance optimization, parallelism, register spilling      420—421
Program performance optimization, procedure calls, reducing      391—393
Program performance optimization, program example      384—387
Program performance optimization, store latency      431—436
Program performance optimization, unneeded memory references, eliminating      393—395
Program performance, expressing      382—387
Program profiling      437—439
Program registers      258 279
Programmable ROM (PROM)      463
Programmer-visible state      258
Progress graph      874
Progress graph, deadlock region of      892
Progress graph, forbidden region in      877
Progress graph, initial state of      874
Progress graph, safe trajectory through      875
Progress graph, trajectory through      874
Progress graph, transition in      874
Progress graph, unsafe region of      875
Progress graph, unsafe trajectory through      875
Prologue block      746
PROM (Programmable ROM)      463
Protocol      806
Protocol software      806
Proxy caches      830
Proxy chain      830
ps (picosecond)      309
PTBR (Page Table Base Register)      704
PTE (Page Table Entry)      697 111
Pthreads      863
pthread_cancel [Unix] terminate another thread      865
pthread_create [Unix] create a thread      864
pthread_detach [Unix] detach thread      866
pthread_exit [Unix] terminate current thread      864
pthread_join [Unix] reap a thread      865
pthread_once [Unix] initialize a thread      866
pthread_self [Unix] get thread ID      864
Public declarations (C++ and Java)      546
Purify      576
pushl [IA32] push double word      139 140
pushl [Y86] push      260
pushl [Y86] push, ambiguous semantics      269—270
pushl [Y86] push, tracing the execution of      287
putenv [Unix] create/change environment variable      613
Quad words      135
quote [HCL] insert quoted text from HCL file to C file      906
Quoted text, in HCL      906
Race      868 890
race.c [CS:APP] program with a race      890
RAM      see "Random-access memory (RAM)"
Rambus DRAM (RDRAM)      462
rand      886
Random replacement policy      485
Random-access memory (RAM)      28 279 457—464 524
Random-access memory (RAM), conventional DRAMs      458—459
Random-access memory (RAM), dynamic RAM (DRAM)      458—459
Random-access memory (RAM), enhanced DRAMs      461—462
Random-access memory (RAM), memory modules      459—460
Random-access memory (RAM), nonvolatile memory      462—463
Random-access memory (RAM), static RAM (SRAM)      457—458
RAS (Row Access Strobe)      459
RDRAM (Rambus DRAM)      462
rdtsc [IA32] read time stamp counter      663
Reachability graph      756
Reachable      756
Read bandwidth      512
Read operation, defined      779
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