Уэйкерли Дж.Ф. — Проектирование цифровых устройств (том 1) :: Электронная библиотека попечительского совета мехмата МГУ

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Уэйкерли Дж.Ф. — Проектирование цифровых устройств (том 1)

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Название: Проектирование цифровых устройств (том 1)

Автор: Уэйкерли Дж.Ф.

Аннотация:

Основополагающий учебник, в котором рассмотрены все направления современной цифровой электроники. Особое внимание уделено программируемым логическим интегральным схемам (ПЛИС).
Предназначен для студентов, аспирантов и преподавателей ВУЗов, разработчиков аппаратуры.

Язык:

Статус предметного указателя: Готов указатель с номерами страниц

ed2k: ed2k stats

Год издания: 2002

Количество страниц: 1087

Добавлена в каталог: 31.03.2006

Операции: Положить на полку | Скопировать ссылку для форума | Скопировать ID

Предметный указатель

Process statement      344
Product component      519
Product term      252 397
Product-of-sums expression      252
Product-term allocation      1008
Product-term allocator      1009
Programmable array logic device      37 401
Programmable logic array      37 397
Programmable logic device      37
Programmable read-only memory      971
Programmable switch element      1024
Programmable switch matrix      1024
PROM      971
PROM programmer      411 971
Propagation delay      151 627
PSE      1024
PSM      1024
Pull-up resistor      160
Pull-up-resistor calculation      165
Pulse input      751
Pulse-mode circuit      751
Pulse-triggered flip-flop      639
Pure      613
Push-pull output      192
PWB      40
Quiescent power dissipation      153
Quine — McClusky algorithm      283
Race      711
Radio-frequency emission      1041
RADIX      50
Radix point      50
Radix-complement system      60
RAM      983
Random-access memory      983
RANGE      307 332
Range-type      327
RAS-only refresh cycle      1000
RC time constant      148
Read cycle      1000
Read-modify-write cycle      1002
Read-only memory      960
Read/write memory      983
Realization      261
Realize      261
Recommended operating conditions      206
Recovery time      629
Rectangular sets of 1s      271
Redundant prime implicant      290
Reference designator      388 1036
Reflected code      78
Reflection      1055
Reflection coefficient      1056
Refresh cycle      998
Reg      731
register      780
Register-transfer language      1034
Registered carry output      820
Registered output      731
Relation      309
Relational operators      309 342
Reliability      1048
Reserved words      321
Reset      626
Resistive load      131
Resolution function      461
RESULT      329
RETURN      330
Return-to-Zero      99
Reverse-biased diode      181
Right      828
Ring counter      839
Ringing      1060
Ripple adder      501
Ripple counter      805
Rise time      145
ROM      960
Routing      1041
Row address strobe      999
Row latch      1000
Row-address register      1000
Running disparity      99
Running process      345
RWM      983
RZ      99
S-R latch      626
S-R latch with enable      630
S-set      357
Saturated      187
Saturation region      187
Saturation resistance      187
Scan capability      636
Scan chain      637
Scan method      1047
Scan mode      1047
Scan-path method      1047
Schematic capture      1035
Schematic diagram      370
Schematic editor      1035
Schmitt-trigger input      156
Schottky diode      190
Schottky transistor      190
Schottky TTL      204
Schottky-clamped transistor      190
SDRAM      1003
Secondary essential prime implicant      276
Security fuse      413
Selected signal-assignment statement      342
Self-complementing code      76
Self-correcting counter      840
Self-correcting Johnson counter      844
Self-correcting ring counter      840
Self-dual logic function      364
Self-timed systems      908
Semiconductor diode      113 180
Semicustom IC      39
Sense amplifier      998
Sensitivity list      345
Sequential circuit      28 110
Sequential multiplier      520
Sequential signal-assignment statement      345
Serial binary adder      865
Serial channel      832
Serial data      96
Serial input      825
Serial output      825
Serial-access memory      985
Serial-in, parallel-out shift register      825
Serial-to-parallel conversion      826
Series termination      1062
Set      307 626
Set-reset latch      626
Setup time      632
Setup-time margin      771
Seven-segment decoder      438
Seven-segment display      436
Shift register      825
Shift-and-add multiplication      71
Shift-and-add multiplier      870
Shift-and-subtract division      73
Shift-register counter      838
Sign bit      59
Sign extension      62
Signal declaration      323
Signal flags      384
Signal name      1036
Signal path      151
Signed division      73
Signed multiplication      72
Signed numbers      68
Signed-magnitude adder      59

Signed-magnitude subtracter      60
Simulation      1038
Simulation cycle      353
Simulation time      352
Simulator      1038
Single error      85
Single stuck-at fault      1042
Single stuck-at fault model      313
Single-ended input      218
Sinking current      135 194
Slave      633
Small-scale integration      34
SMT      40
Sneak path      966
Software model      1039
Source      115
Source termination      1062
Sourcing current      135 195
Space/time tradeoff      833
Specification      29
Speed-power product      173
SRAM      983
SRAM cell      986
SSI      34
SSRAM      992
Stable state      623
Stable total state      706
Standard cells      39
Standard-cell design      39
Standby mode      974
State      28 619
State adjacency diagram      722
State assignment      658
State diagram      647 650
State memory      644
State minimization      658
State name      649
State table      110 650 706
State variable      619
State-machine decomposition      701
State-machine description language      733
State-vector      733
State/output table      647 650
Static power dissipation      153
Static RAM      983
Static-0 hazard      293
Static-1 hazard      293
Static-column mode      1003
Std_logic      325
Std_logic vector      329
Steady-state behavior      292
Storage time      190
Stray capacitance      146
String      299 328
Structural description      337
Structural design      338
Structural model      1038
Structured logic device description      371
Stupid mistakes      1041
Submachines      701
Subtractor      500
Subtrahend      60
Subtype      325 460
Sum term      252
Sum-of-products expression      252
Surface-mount technology      40
Suspended process      345
Switching algebra      239
Switching characteristics      206
Symmetric output drive      170
Sync pulse      833
Synchronization pulse      833
Synchronization signal      97
Synchronizer      880
Synchronizer failure      883
Synchronizing sequence      745
Synchronous counter      806
Synchronous DRAM      1003
Synchronous parallel counter      807
Synchronous serial counter      807
Synchronous SRAM      992
Synchronous system      866
Syndrome      92
Synthesis      318
t      887
T flip-flop      642
T flip-flop with enable      643
Temporary failure      84
Termination impedance      1056
Test benches      31 317
Test enable input      636
Test fixture      1043
Test input      637
Test output      637
Test points      1043
Test-generation program      1043
Testing      1041
Test_vectors      301 312 1042
Thermal concerns      1040
Thevenin equivalent      133
Thevenin resistance      133
Thevenin termination      1061
Thevenin voltage      133
Three-state buffer      158 449
Three-state bus      158
Three-state driver      449
Three-state enable      449
Three-state output      158
TI      637
Tick      644
Timeslot      835
Timing diagram      371 390
Timing margin      771
Timing skew      729
Timing table      391
Timing verification      318 1038
Timing verifier      1038
Title statement      298
TO      637
Total number of states      665
Total state      706
Totem-pole output      192
Trace      1058
Transient behavior      292
Transistor simulation      187
Transistor-transistor logic      113
Transition equation      649
Transition expression      655
Transition frequency      153
Transition list      689
Transition p-term      691
Transition s-term      693
Transition table      649 706
Transition time      145
Transition-sensitive media      98
Transition/excitation table      670
Transition/output table      653
Transmission gate      155
transmission line      1054
Transparent latch      631
Tri-state output      158
TRUE      324
Truth_table      110 250 304
TTL      113
TTL compatible      169 170 177
TTL compatible with TTL $V_{OH}$       177
TTL load      175
Turn-around penalty      995
Twisted-ring counter      842
Two-dimensional code      93

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