Martin K. — Digital Integrated Circuit Design :: Электронная библиотека попечительского совета мехмата МГУ

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Martin K. — Digital Integrated Circuit Design

Martin K. — Digital Integrated Circuit Design

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Название: Digital Integrated Circuit Design

Автор: Martin K.

Аннотация:

The impact of digital integrated circuits on our modern society has been pervasive. They are the enabling technology of the current computer and information-technology revolution. This is largely true because of the immense amount of signal and computer processing that can be realized in a single integrated circuit; modern IC's may contain millions of logic gates. This text book is intended to take a reader having only a minimal background and knowledge in electronics to the point where they can design state-of-the-art digital integrated circuits.

Designing high-performance digital integrated circuits requires expertise in many different areas. These include semiconductor physics, integrated circuit processing, transistor-level design, logic-level design, system-level design, testing, etc. Aspects of these topics are covered throughout this text, although the emphasis is on transistor-level design of digital integrated circuits and systems. This is in contrast to the perspective in many other texts, which takes a system-level or VLSI approach where transistor-level details are minimized. It is the author's belief that before system-level considerations can be properly evaluated, an in-depth tranisistor-level understanding must first be obtained. Important system-level considerations such as timing, pipe-lining, clock distribution, and system building blocks are covered in detail, but the emphasis on transistors first. Throughout the book, physical and intuitive explanations are given, and although mathematical quantitative analysis of many circuits have necessarily been presented, Martin has attempted not to "miss seeing the forest because of the trees". Thisbook presents the critical underlying concepts without becoming entangled in tedious and over-complicated circuit analyses. It is intended for senior/graduate level students in electrical and computer engineering. This course assumes the Sedra/Smith Microelectronic Circuits course as a prerequisite.

* Strong emphasis on intuitive physical examples
* Emphasizes conceptual thinking over detailed circuit analysis techniques
* Transistor level details are presented before system considerations

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Рубрика: Технология/

Статус предметного указателя: Готов указатель с номерами страниц

ed2k: ed2k stats

Год издания: 2000

Количество страниц: 543

Добавлена в каталог: 16.03.2007

Операции: Положить на полку | Скопировать ссылку для форума | Скопировать ID

Предметный указатель

SPICE simulations, P-SPICE      15
SPICE simulations, pseudo-NMOS inverters      178 220—225
SPICE simulations, resistances      272
SPICE simulations, reverse-biased diode      81 155—156
SPICE simulations, silicon JFETs      487
SR flip-flop      295 296—297 511
SRAM      see "Static random-access memory"
Static CMOS digital latches      285—291
Static random-access memory (SRAM)      291—293 438—440 438—452
Static random-access memory (SRAM), large capacity      457—458
Static random-access memory (SRAM), sense amplifier      449—452
Static random-access memory (SRAM), storage cells      440—452
Static random-access memory sense amplifier      449—452
Storage cells, dynamic RAM      459—460
Storage cells, sensing OM cells      467—470
Storage cells, static RAM      440—452
Strong inversion      95
Subthreshold current      90
Subthreshold region, MOS transistors      105—106
Subtractors      see "Digital subtractors"
Sum-generate function      339
Superbuffer FET logic (SBFL)      496
Synchronous counter      406
Synchronous logic circuits, design      304—312
Synchronous logic circuits, flip-flops      294—304
Synchronous logic circuits, Gray-code counter      313—317 406
Synchronous logic circuits, master clock distribution      309—312
Synchronous logic circuits, pipelined systems      305—306
Synchronous logic circuits, register-based controllers      317—320
Synchronous logic circuits, system clock issues      306—309
Synchronous logic gates      284
System clock, synchronous logic circuits      306—309
T flip-flop      301 511
T-model      138
TDFL      see "Two-phase dynamic FET logic"
Terminating emitter-coupled logic      332—333
Test mode      512
Testing, automatic test equipment      510 526
Testing, boundary-scan testing      526—532
Testing, built-in logic-block observation (BILBO)      522—526
Testing, built-in self-test (BIST)      518 523
Testing, design and      508—511
Testing, level-sensitive scan design (LSSD)      512—517
Testing, maximal-length linear-feedback shift register (LFSR)      518—521
Testing, random-access LSSD      518
Testing, random-access scan      518
Testing, scan-path design      517
Testing, Scan/Set testing      517—518
Testing, signature analysis      518 521—522
Tetraelhyl orthosilicate (TEOS)      59
Thermal oxide      42
Thin-film resistors, GaAs digital circuits      486
Three single-phase clock (TSPC) logic      382 383
Three-state counter      406
Three-state outputs      276—278
Threshold voltage      21—22 90
Threshold voltage, CMOS inverter      201—202
Threshold voltage, MOS transistors      128—130

Threshold voltage, pseudo-NMOS inverter      172—173
Threshold-voltage-adjust implant      43
Toggle flip-flops      301 511
Total gate capacitance      91
Transconductance      149 199
Transfer curves      19—22
Transient overshoot      483
Transient response, CMOS inverter      204—209
Transient response, logic gate      25—29
Transient response, pseudo-NMOS inverter      179
Transient response, RC approximation      29—31
Transistor current gain      120
Transistor threshold voltage      21—22 90
Transistors, bipolar-junction transistors (BJT)      see "Bipolar-junction transistors"
Transistors, choosing sizes      194—195 205—209
Transistors, CMOS transistors      35—61
Transistors, depletion transistors      86 88 99
Transistors, depletion-load transistors      198—200
Transistors, diode-connected      367 429
Transistors, drive transistors      184 187
Transistors, enhancement MOS transistors      66
Transistors, equivalency      184—200
Transistors, floating-gate transistor      471—472
Transistors, heterojunction bipolar technology (HBT)      503—505
Transistors, high electron mobility transistors, (HEMTs)      485—486
Transistors, large-signal modeling      95—97 113—114
Transistors, lightly doped drain (LDD) transistor      55—61
Transistors, MNMOS transistors      478
Transistors, npn bipolar transistors      69
Transistors, parasitic bipolar transistor      107
Transistors, pass transistor      237
Transistors, saturated      114 116
Transistors, sizes      194—195 205—209
Transistors, transconductance      149 199
Transistors, triple-poly transistors      478
Transmission gates      237
Transmission gates, clock-feedthrough      248—252
Transmission gates, leakage currents      247
Transmission gates, logic design      237—252
Triode region, gate capacitance      261
Triode region, MOS transistors      164
Triode region, small-signal modeling      165
Triode region, small-signal MOS modeling      141—145
Triode reigon      94
Triode relationship, MOS transistors      130—133
Triple-poly transistors      478
TSPC logic      see "Three single-phase clock logic"
Tunneling, Fowler — Nordheim      473 476 47l
Twin-tub process      46
Two-phase dynamic FET logic (TDFL)      500—503
Two-phase PLAs      431—433
Velocity concentration      97
Voltage-limited pseudo-NMOS (VLPN)      367
Weak inversion      95
Well regions, definition      36—38
Word lines      438
Word lines, level-boosted      463—464
Writable ROM (WROM)      465

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