√лавна€    Ex Libris     ниги    ∆урналы    —татьи    —ерии     аталог    Wanted    «агрузка    ’удЋит    —правка    ѕоиск по индексам    ѕоиск    ‘орум   

ѕоиск по указател€м

Martin K. Ч Digital Integrated Circuit Design
Martin K. Ч Digital Integrated Circuit Design

„итать книгу

—качать книгу с нашего сайта нельз€

ќбсудите книгу на научном форуме

Ќашли опечатку?
¬ыделите ее мышкой и нажмите Ctrl+Enter

Ќазвание: Digital Integrated Circuit Design

јвтор: Martin K.


The impact of digital integrated circuits on our modern society has been pervasive. They are the enabling technology of the current computer and information-technology revolution. This is largely true because of the immense amount of signal and computer processing that can be realized in a single integrated circuit; modern IC's may contain millions of logic gates. This text book is intended to take a reader having only a minimal background and knowledge in electronics to the point where they can design state-of-the-art digital integrated circuits.

Designing high-performance digital integrated circuits requires expertise in many different areas. These include semiconductor physics, integrated circuit processing, transistor-level design, logic-level design, system-level design, testing, etc. Aspects of these topics are covered throughout this text, although the emphasis is on transistor-level design of digital integrated circuits and systems. This is in contrast to the perspective in many other texts, which takes a system-level or VLSI approach where transistor-level details are minimized. It is the author's belief that before system-level considerations can be properly evaluated, an in-depth tranisistor-level understanding must first be obtained. Important system-level considerations such as timing, pipe-lining, clock distribution, and system building blocks are covered in detail, but the emphasis on transistors first. Throughout the book, physical and intuitive explanations are given, and although mathematical quantitative analysis of many circuits have necessarily been presented, Martin has attempted not to "miss seeing the forest because of the trees". Thisbook presents the critical underlying concepts without becoming entangled in tedious and over-complicated circuit analyses. It is intended for senior/graduate level students in electrical and computer engineering. This course assumes the Sedra/Smith Microelectronic Circuits course as a prerequisite.

* Strong emphasis on intuitive physical examples
* Emphasizes conceptual thinking over detailed circuit analysis techniques
* Transistor level details are presented before system considerations

язык: en

–убрика: “ехнологи€/

—татус предметного указател€: √отов указатель с номерами страниц

ed2k: ed2k stats

√од издани€: 2000

 оличество страниц: 543

ƒобавлена в каталог: 16.03.2007

ќперации: ѕоложить на полку | —копировать ссылку дл€ форума | —копировать ID
ѕредметный указатель
Accumulated channel      90
Active masks, layout      49Ч51
Active region      94 113
Active region equation      95
Active region, base charge storage      114
Active region, gate capacitance      260Ч261
Active region, small-signal MOS modeling      133Ч141 165Ч166
Active regions      49
Acyclic logic      427 512 513
Acyclic logic gates      284
Adders      see "Digital adders"
Address buffers      452Ч455
Address decoder      347
Address transition bus (ATBR)      456
Address-transition-detect (ATD) circuits      455Ч457
Air-bridge interconnect      487
Alloys, MESFETs      485
Anisotropic etch      59Ч60
annealing      40 46
ATBR      see "Address transition bus"
ATD circuits      see "Address-transition-detect circuits"
Automatic test equipment      510 526
Avalanching      104
Back-gating      489
Ballistic transport      4Ч83
Barrel shifter      403Ч405
Base charge storage, active region      114
Base charge storage, bipolar-junction transistors (BIT)      148
Base charge storage, saturated transistor      114Ч116
Base overdrive current      115
Base-transit-timc constant      114
BFL      see "Buffered-FET logic"
BiCMOS differential cascade-voltage-switch logic gate (DCVSL)      357
BiCMOS inverter      351Ч352
BiCMOS logic      324 350
BiCMOS logic gales      351Ч355
BiCMOS proccss      47
BILBO      see "Built-in logic-block observation"
Biphase latches      290 344
Bipolar logic gates      324Ч325
Bipolar technology, heterojunction bipolar technology (HBT)      503Ч505
Bipolar-junction transistors (BJT)      109Ч110
Bipolar-junction transistors (BJT), base charge storage      114Ч116 148
Bipolar-junction transistors (BJT), exponential relationship      145Ч147
Bipolar-junction transistors (BJT), graded junction      78Ч79
Bipolar-junction transistors (BJT), large-signal modeling      113Ч114
Bipolar-junction transistors (BJT), modeling      69Ч71 113Ч114 116Ч118 148Ч155 167Ч168
Bipolar-junction transistors (BJT), operation      110Ч112
Bipolar-junction transistors (BJT), processing      48
Bipolar-junction transistors (BJT), small-signal modeling      116Ч118
Bipolar-junction transistors (BJT), SPICE modeling parameters      120Ч122
Body effect      98Ч99 130 199
Body-effect constant      98 130
Bonding pads, parasitic capacitance      278
Boundary-scan testing      526Ч532
Buffered-FET logic (BFL)      491Ч493 503
Built-in logic-block observation (BILBO)      522Ч526
Built-in self test (BIST)      518 523
Butting contact      56
Capacitively coupled Domino logic (CCDL)      500Ч502
Capacitively enhanced logic (CEL)      493Ч495 503
Capacitors, GaAs digital circuits      486
Carry-generate function      339
Carry-lookahead adders      414
Carry-lookahead counter      406
Carry-propagate adders      415
Carry-save adders      412Ч414 426
Carry-select adders      414 415
CCDL      see "Capacitively coupled Domino logic"
Cel      see "Capacitively enhanced logic"
Channel-length modulation      96 136
Charge pumps, EPROM circuits      477Ч478
Charge sharing, Domino logic gates      374Ч376
Charge-pump driver      463
Chemical vapor deposition (CVD)      40
CiCMOS process      350 351
Clock latch      240Ч241
Clock-feedthrough, transmission gates      248Ч252
Clocked inverter      293
Clocked latches, CMOS      285Ч294
Clocks, level-sensitive scan design (LSSD) and      514Ч516
CMOS circuits      86
CMOS circuits, differential-logic design      252Ч256
CMOS clocked latches      285Ч294
CMOS flip-flops      301Ч304
CMOS Inverter      200Ч201
CMOS inverter, design      364Ч393
CMOS inverter, rise and fall time      23Ч24
CMOS inverter, small-signal modeling      202Ч204
CMOS inverter, SPICE simulations      199 225Ч229
CMOS Inverter, threshold voltage      201Ч202
CMOS Inverter, transient response      204Ч209
CMOS logic      169 200Ч212 350
CMOS logic gates      8Ч14 22 169
CMOS logic gates, delay      270Ч272
CMOS logic gates, design      212Ч220 252Ч256
CMOS logic gates, noise margin      22
CMOS logic, design      364Ч393
CMOS logic, differential CMOS      382 384Ч388
CMOS transistors, layout and design      48Ч59
CMOS transistors, processing      35Ч47 59Ч61
CMOS transmission gates      245
Combinatorial logic      512
Computer simulation      14Ч19
Conditional-carry adders      418
Constant, field scaling      102 103
Constant-voltage scaling      104
Contact holes, opening      46
Contact masks, layout      50
Counters      405Ч408
Current-mode logic (CML)      327 333 334Ч335
Current-mode logic (CML), buffers      349Ч350
Current-mode logic (CML), differential-to-single-ended conversion      346Ч349
Current-mode logic (CML), flip-flops      346
Current-mode logic (CML), latches      344
Current-mode logic buffers      349Ч350
Current-mode logic flip-flops      346
Current-mode logic gates      335Ч344
Current-mode logic latch      344
Curtice model      489
Cutoff region, small-signal MOS modeling      141Ч145
CVD      see "Chemical vapor deposition"
Cyclic logic gates      284
Czochralski method      36
D flip-flop      295Ч296 511
Data mode      512
DCL      see "Direct-coupled logic"
DCVSL      see "Differential cascade-voltage-switch logic gate"
de Morgan's theorem      338
Decoders      400Ч403 438 452Ч455
Delay time      23Ч24
Delay, CMOS logic gates      270Ч272
Delay, MOS circuits      260Ч274
Delay, RC ladder structure      267Ч270
Depletion capacitance      74 76 79 153
Depletion transistors      86 88 99
Depletion-load transistors, NMOS logic      198Ч200
DIBL      see "Drain-induced barrier lowering"
Differential cascade-voltage-switch logic gate (DCVSL)      357
Differential CMOS      382 384Ч388
Differential current-mode logic      346Ч349
Differential NORA logic      390
Differential split-level (DSL) CMOS logic      385Ч387
Differential-logic design      252
Differential-logic design, CMOS circuits      252Ч256
Diffusion capacitance      84 153
Diffusion capacitance, diodes      125Ч126
Diffusion implantation      38
Digital adders      408
Digital adders, carry-lookahead adders      414
Digital adders, carry-propagate adders      415
Digital adders, carry-save adders      412Ч414 426
Digital adders, carry-select adders      414 415
Digital adders, conditional-carry adders      418
Digital adders, full adder      338 339 408
Digital adders, ripple-carry adders      412
Digital adders, single-bit adders      408Ч412
Digital latch      285
Digital latch, current-mode logic latch      344
Digital latch, static CMOS digital latch      285Ч291
Digital multipliers      419Ч426
Digital subtractors      418Ч419
Diode-connected transistors      367 429
Diodes, diffusion capacitance      125Ч126
Diodes, exponential relationship      122Ч125
Diodes, forward-biased diode      126Ч127 163Ч164
Diodes, modeling      126Ч127 163Ч164
Diodes, reverse-biased diodes      74Ч78 163
Diodes, Schottky diodes      72 85Ч86
Diodes, single-sided diode      75
Diodes, SPICE modeling parameters      118Ч119
Direct-coupled logic (DCL)      495Ч498 503
Direct-path current      211
DML      see "Current-mode logic"
Domino logic gates      373 374
Domino logic gates, charge sharing      374Ч376
Domino logic gates, multiple-output      376Ч377
Domino logic, capacitively coupled Domino logic (CCDL)      500Ч502
Domino-CMOS logic      368 370Ч377
Domino-CMOS logic without inverters      373Ч374
Domino-CMOS logic, charge sharing of Domino logic gates      374Ч376
Domino-CMOS logic, multiple-output Domino logic circuits      376Ч377
Domino-CMOS logic, static      374
Donors      71
Dopants      71
Double-polysilicon process      442
Drain side-wall capacitance      140
Drain-induced barrier lowering (DIBL)      105
Drain-lag      489Ч490
DRAM      see "Dynamic random-access memory"
Drift      83
Drive transistors      184 187
DSL CMOS logic      see "Differential split-level CMOS logic"
Dynamic bus equalization      455
Dynamic CMOS latches      293Ч294
Dynamic FET logic, two-phase      see "Two-phase dynamic FET logic"
dynamic loads      367Ч370 398
Dynamic logic gates      500Ч502
Dynamic precharging      367Ч370
Dynamic random-access memory (DRAM)      458Ч464
Dynamic random-access memory (DRAM), level-boosted word lines      463Ч464
Dynamic random-access memory (DRAM), sense amplifier      461Ч463
Dynamic random-access memory (DRAM), storage cells      459Ч460
Dynamic random-access memory sense amplifier      461Ч463
ECL      see "Emitter-coupled logic"
Edge detectors      456Ч457
Edge-triggered SR flip-flop      297Ч298
EEPROMs      see "Electrically erasable EPROMs"
Effective gate-source voltage      90
Effective minority earner lifetime      106
Electrically erasable EPROMs (EEPROMs)      474Ч475 477
Electrically programmable ROM (EPROM)      438 465 471Ч475
Electron lifetime      106
electron-hole pairs      104
Emission coefficient      118
Emitter-coupled logic (ECL)      327
Emitter-coupled logic gates      325Ч333
Enhancement MOS transistors      66
EPROM      see "Electrically programmable ROM"
Etching, anisotropic etch      59Ч60
Etching, hydrofluoric acid      40
Etching, reactive ion etching      59
Etching, reactive plasma etching      44
Eutectic bonds      46
Exclusive-or function      183 237Ч239 409Ч410 456
Exponential relationship, bipolar-junction transistors (BJT)      145Ч147
Exponential relationship, diodes      122Ч125
Fall time, pseudo-NMOS inverter      180Ч182
Fermi potential      129
Field implants      40Ч41 140
Field oxide      40Ч42
Finite-field theory      519
Flash EPROMs      474 475 477
Flip-flops      294Ч295
Flip-flops, CMOS flip-flops      301Ч304
Flip-flops, current-mode logic flip-flops      346
Flip-flops, D flip-flop      295Ч296 511
Flip-flops, edge-triggered SR flip-flop      297Ч298
Flip-flops, JK flip-flop      298Ч300 304 346 405 511
Flip-flops, master-slave flip-flop      346 511
Flip-flops, SR flip-flop      295 296Ч297 511
Flip-flops, T flip-flop      301 511
Flip-flops, testing      511
Floating-gate transistor      471Ч472
Forward-biased diode, junction capacitance      84Ч85
Forward-biased diode, modeling equations      163Ч164
Forward-biased diode, small-signal modeling      126Ч127 164
Forward-biased junctions      83Ч85
Four-transistor memory cell      442
Fowler Ч Nordheim tunneling      473 476 477
Full adder      338 339 408
Fusible-link, ROM      465
Gale capacitance, MOS circuits      260Ч261
Gallium arsenide (GaAs) digital circuits      483Ч484
Gallium arsenide (GaAs) digital circuits, air-bridge interconnect      487
Gallium arsenide (GaAs) digital circuits, buffered-FET logic (BFL)      491Ч493 503
Gallium arsenide (GaAs) digital circuits, capacitively coupled Domino logic (CCDL)      500Ч502
Gallium arsenide (GaAs) digital circuits, capacitively enhanced logic (CEL)      493Ч495 503
Gallium arsenide (GaAs) digital circuits, capacitors      486
Gallium arsenide (GaAs) digital circuits, direct-coupled logic (DCL)      495Ч498 503
Gallium arsenide (GaAs) digital circuits, dynamic logic gates      500Ч502
Gallium arsenide (GaAs) digital circuits, heterojunction bipolar technology (HBT)      503Ч505
Gallium arsenide (GaAs) digital circuits, MESFETs      484 485 487Ч491
Gallium arsenide (GaAs) digital circuits, on-chip inductors      486Ч487
Gallium arsenide (GaAs) digital circuits, Schottky diode      486
Gallium arsenide (GaAs) digital circuits, source-coupled logic (SCL)      498Ч500 503
Gallium arsenide (GaAs) digital circuits, thin-film resistors      486
Gallium arsenide (GaAs) digital circuits, two-phase dynamic FET logic (TDFL)      500Ч503
Gate oxide      42
Gate threshold voltage, pseudo-NMOS inverter      175Ч178
Gate-overlap capacitance      261
generate function      410
Graded junction      78Ч79
Gray-code counter      313Ч317 406
H-SPICE      15 119
HEMTs      see "High electron mobility transistors"
Heterojunction bipolar technology (HBT)      503Ч505
High electron mobility transistors (HEMTs)      485Ч486
Hole lifetime      106
Hot-carrier effects      104Ч106
Hybrid-re model      116 149
Hysteresis, MESFETs      489Ч490
Impact ionization      104
Indium phosphide      505
Input impedance, MOS logic gate      274
Input-output circuits      274Ч280
Input-protection circuits      274Ч275
Integrated injection logic      367n
Interconnect capacitance, MOS circuits      265Ч267
Interconnect metal      46
Intrinsic gate capacitance      261
Intrinsic silicon      71 128
Inverted channel      90
Inverted latches      286
Inverter delay time      23Ч24
ion implantation      38 44
JK flip-flop      298Ч300 304 346 405 511
Junction capacitance      43 53 54 68
Junction capacitance, forward-biased diode      84Ч85
Junction capacitance, large-signal capacitance      80Ч81
1 2 3
       © Ёлектронна€ библиотека попечительского совета мехмата ћ√”, 2004-2019
Ёлектронна€ библиотека мехмата ћ√” | Valid HTML 4.01! | Valid CSS! ќ проекте