Авторизация
Поиск по указателям
Shiva S.G. — Computer design and architecture
Обсудите книгу на научном форуме Нашли опечатку?
Название: Computer design and architectureАвтор: Shiva S.G. Аннотация: This unique and proven text provides a hands-on introduction to the design of a computer system-depicting, step by step, the arrangement of a simple but complete hypothetical computer followed by detailed architectural features of existing computer systems as enhancements to the structure of the simple computer. Changes in the Third Edition of Computer Design and Architecture include · updates to reflect contemporary organizations and devices · new technologies and devices in combinatorial and integrated circuits · new technologies in sequential circuits · new technologies in memory and storage · the latest architecture examples · contemporary memory hierarchy concepts Ideal for one- or two-semester courses! With end-of-chapter summaries, references, and problems, as well as over 250 drawings and tables, Computer Design and Architecture, Third Edition is a classroom-tested text for upper-level undergraduate and graduate students in electrical and computer engineering and computer science taking design courses such as Computer Systems Design, Computer Hardware Design, Computer Architecture, Computer Organization, and Assembly Language Programming.
Язык: Рубрика: Computer science /Статус предметного указателя: Готов указатель с номерами страниц ed2k: ed2k stats Год издания: 2000Количество страниц: 718Добавлена в каталог: 11.12.2007Операции: Положить на полку |
Скопировать ссылку для форума | Скопировать ID
Предметный указатель
A simple computer (ASC) 181 A simple computer (ASC), addressing modes 191 A simple computer (ASC), assembler 203—210 A simple computer (ASC), bus structure 221—223 A simple computer (ASC), console 249—257 A simple computer (ASC), control unit 232—267 A simple computer (ASC), data format 184 A simple computer (ASC), data, instruction, address flow 217—221 A simple computer (ASC), hardware components 183 A simple computer (ASC), input/output 230—232 A simple computer (ASC), instruction execution 216 A simple computer (ASC), instruction format 184—186 A simple computer (ASC), instruction set 186—191 A simple computer (ASC), program execution 216—217 Absolute address 187 188 198 Access time 154 Accumulator register (ACC) 182 Adders 36—40 Adders, carry look ahead 525 Adders, full 36 37—39 Adders, half 36—38 Adders, ripple-carry 37 Address extension 447 Address mapping function 433 Address modifiers 380 address translation 433 Addressing modes 185 379—384 Addressing modes, base-register 381 Addressing modes, DEC PDP-11 of 383 Addressing modes, DEC VAX of 384 Addressing modes, direct 185 191 196 Addressing modes, IBM 370 of 384 Addressing modes, immediate 195 379 Addressing modes, implied 383 Addressing modes, indexed 185 192—194 Addressing modes, indexed-indirect (pre-indexed indirect) 194 195 Addressing modes, indirect 185 194 195 Addressing modes, indirect-indexed (post-indexed indirect) 194 195 Addressing modes, INTEL 8080 of 382 Addressing modes, INTEL 8086 of 382 Addressing modes, literal 196 Addressing modes, M6502 of 382 Addressing modes, MC6800 of 382 Addressing modes, paged 379 Addressing modes, relative 381 Analog-digital converters (A/D) 312 AND-OR circuits 29—30 Architectures, classes of 572 Architectures, dataflow 617 Architectures, design Vs 8 Architectures, distributed processing system 618 Architectures, network 618 Architectures, RISC 484 Arithmetic 635—645 arithmetic and logic unit (ALU) 523 Arithmetic shift 524 Arithmetic, binary 635 Arithmetic, decimal 535 Arithmetic, hexadecimal 642 Arithmetic, octal 640 Assembler 417 Associative memory 144 147—149 167 Backward daisy chain 295 Bank switching 449 banking 426 Base register 381 Binary system 626 Bipolar logic families 57 Bipolar logic families, ECL 57 Bipolar logic families, TTL 57 Bit-parallel 523 Bit-serial 523 Boolean algebra (switching algebra) 21—22 Branch history 479 Branch prediction 479 Bus, arbitrator 300 Bus, architecture 299 Bus, control 300 Bus, standards 322 Bus, transfer 124 Cache memory 431 Carry 11 Carry look ahead adder (CLA) 525 Channels 300 Characteristic tables 83 Class code method 0 Code converters 40 codes 651 Codes, alphanumeric 653 Codes, BCD 651 Codes, excess-3 652 Codes, two-out-of-five 653 Coincident decoding 158 Combinational circuits 11 Combinational circuits, analysis of 23—28 Combinational circuits, Compact disk ROMs (CDROM) 156 Combinational circuits, synthesis of 29—35 Compaq SP700 409 Compatible I/O bus structure 299 Complex instruction set computers (CISC) 365 Computer networks 618 Computer, architectures 7 Computer, evolution 5—8 Computer, generations 6 Computer, levels of 8 Computer, system organization 2—4 Connection machine, CM-1 580 Connection machine, CM-5 589 Content-addressable memory (CAM) see Associative memory Control data 6600 6 353 552 Control ROM (CROM) 257 CPU-I/O device handshake 281 Cray, series 555 CRAY, T3E 592 CRAY, X-MP 555 Cycle stealing 298 Cycle time 154 Daisy chain 292 Data conversion 279 284 Data transfer rate 154 DEC, PDP-11 system 348 388 DEC, VAX-11/750 492 Decoders 40 Delayed branching 479 DeMorgan’s Law 22 Demultiplexers 45 Device controller 283 Device interface 277 Device priority 292 Digital to analog converters (D/A) 312 Diminished radix complement 649 Direct mapping 435 Direct Memory Access 295 Direct-access memory (DAM) 144 152 171 Direct-access memory (DAM), erasable disks 171 Direct-access memory (DAM), floppy disks 171 Direct-access memory (DAM), hard disks 171 Direct-access memory (DAM), magnetic disks 171 Direct-access memory (DAM), optical disks 171 Direct-access memory (DAM), WORM 172 Disk coupled system 303 Division 528 Dynamic memory 160 Dynamic RAM 160 Edge-triggered flip-flops 89 EDSAC 6 EDVAC 6 encoders 42 ENIAC 6 Erasable disks 172 Error detection and correction 284 Even parity 286 Excitation tables 83 Execute phase 221 Fetch phase 217 FIFO 150 Flip-flops 76 Flip-flops, characteristic and excitation tables 83 Flip-flops, delay (D) 81 Flip-flops, edge-triggered 89 Flip-flops, ICs 91 Flip-flops, JK 81 Flip-flops, master-slave 87 Flip-flops, set-reset (SR) 76—80 Flip-flops, T (toggle) 83 Flip-flops, timing, characteristics of 85 Floating-point binary 362 Forward daisy chain 293 Front end processor 302 Fully associative mapping 435 Hardwired control unit (HCU) 481 hazards 67 HDL 128 Hexadecimal system 629 Hit ratio 441 Horizontal microinstruction 483 I/O address space 276 I/O devices 310 I/O function 279 I/O modes of 273 I/O processor 302—305 ILLIAC-IV 578 Immediate addressing 379 Implied (implicit) addressing 382 Index register 182 Indexed addressing 192 Indirect addressing 193 Input/Output see I/O Instruction, buffer 430 480 Instruction, cache 480 Instruction, classification 365 Instruction, cycle 216 Instruction, formats 371 Instruction, length 366 Instruction, opcode selection 369 Instruction, register (IR) 182 Instruction, set 364 Instruction, stream 572 Integrated circuits (ICs) 47—64 679 Integrated circuits (ICs) 7400 680 Integrated circuits (ICs) 7401 680 Integrated circuits (ICs) 7402 680 Integrated circuits (ICs) 7404 680 Integrated circuits (ICs) 7406 680 Integrated circuits (ICs) 74150 683 Integrated circuits (ICs) 74155 685 Integrated circuits (ICs) 74181 539 Integrated circuits (ICs) 7451 680 Integrated circuits (ICs) 7473 690 Integrated circuits (ICs) 7474 688 Integrated circuits (ICs) 7483 682 Integrated circuits (ICs) 7490 691 Integrated circuits (ICs) 7494 693 Integrated circuits (ICs) 7495 694 Integrated circuits (ICs), characteristics of 52 Integrated circuits (ICs), designing with 61 Integrated circuits (ICs), hazards 67 Integrated circuits (ICs), Intel 2114 699 Integrated circuits (ICs), Intel 8202 706 Integrated circuits (ICs), loading and timing 64 Integrated circuits (ICs), Signetics 74189 697 Integrated circuits (ICs), technologies 47—48 Integrated circuits (ICs), Texas Instruments TMS 4116 702 Integrated circuits (ICs), types of 47—48 Integrated dynamic RAMs 163 INTEL 2114 689 INTEL 21285 338 INTEL 8080 387 489 INTEL 8086 387 INTEL 8089 335 INTEL 8202A 706 INTEL pentium II 392 Interleaving 428 Interrupt mode I/O 273 283 Interrupt service routine 286 Interrupt structures 295 Interrupt structures, multipriority vectored 295 Interrupt structures, polled 295 Interrupt structures, single priority 295 Interrupt structures, vectored 295 Interrupts 286 Interrupts, conditions for 286 Interrupts, mechanism for ASC 287 Interrupts, multiple interrupts 290 Interrupts, polling 290 Interrupts, types of interrupt structures 294 Interrupts, vectored interrupts 291 Isolated I/O mode 276 JK flip-flop 81 Karnaugh map (KMap) 659 LIFO SAM 150 Linear decoding 158 Literal addressing mode 200 Loader program 209 Loading analysis 64 Location counter 202 LRU 437 machine language programming 197 Macroinstructions 365 Mapping function 433 Mapping function, fully associative 435 Master-slave flip-flop 87 Memory, bank 426 Memory, CAM 144 146 Memory, DAM 144 152 Memory, Design Using ICs 173 Memory, Devices and Organization 156—173 Memory, Hierarchy 155 Memory, ICs 0 Memory, PLA 164 memory, RAM 144 Memory, ROM 144 146 Memory, RWM 145 Memory, SAM 144—150 Memory, System Parameters 152 Memory, Types of 144 Memory-mapped I/O 276 Microprogrammed control unit (MCU) 481 MIMD machine 572 575 Minimization of Boolean functions 657 Minimization of Boolean functions, K maps 659 Minimization of Boolean functions, QM method 673 Minimization of Boolean functions, Venn diagrams 657 MIPS R10000 498 MISD machine 572 574 Miss ratio 441 Mnemonic 197 MOS logic families 48 MOS logic families, CMOS 48 MOS logic families, NMOS 48 MOS logic families, PMOS 48 MOS technology 6502 370 Motorola 6800 387 Motorola 68000 314 Motorola 68020 465 Motorola 68881 549 Motorola 88100 494 Motorola 88200 495 Multibus I 322 Multibus II 325
Реклама
|
|
О проекте