Авторизация
Поиск по указателям
Shiva S.G. — Computer design and architecture
Обсудите книгу на научном форуме Нашли опечатку?
Название: Computer design and architectureАвтор: Shiva S.G. Аннотация: This unique and proven text provides a hands-on introduction to the design of a computer system-depicting, step by step, the arrangement of a simple but complete hypothetical computer followed by detailed architectural features of existing computer systems as enhancements to the structure of the simple computer. Changes in the Third Edition of Computer Design and Architecture include · updates to reflect contemporary organizations and devices · new technologies and devices in combinatorial and integrated circuits · new technologies in sequential circuits · new technologies in memory and storage · the latest architecture examples · contemporary memory hierarchy concepts Ideal for one- or two-semester courses! With end-of-chapter summaries, references, and problems, as well as over 250 drawings and tables, Computer Design and Architecture, Third Edition is a classroom-tested text for upper-level undergraduate and graduate students in electrical and computer engineering and computer science taking design courses such as Computer Systems Design, Computer Hardware Design, Computer Architecture, Computer Organization, and Assembly Language Programming.
Язык: Рубрика: Computer science /Статус предметного указателя: Готов указатель с номерами страниц ed2k: ed2k stats Год издания: 2000Количество страниц: 718Добавлена в каталог: 11.12.2007Операции: Положить на полку |
Скопировать ссылку для форума | Скопировать ID
Предметный указатель
Multiple-bit shift 525 Multiple-match resolver 147 Multiplexer channel 302 Multiplexers 44 Multiplexers, block 302 Multiplexers, character 302 Multiplication 527 637 640 643 Multiport memories 429 NAND-NAND circuits 30 Negative logic 48 Nonrestoring division algorithm 531 NOR-NOR circuits 30 Octal system 628 Odd parity 285 One address instructions 188 One-address machine 367 Opcode 186 Opcode table 205 OR-AND circuits 30 Page, fault 444 Page, replacement policy 437 443 Page, size 444 Page, table 448 Parity bits 284 Peripheral processors 302 Physical address 442 Pipeline 536 polling 290 Positive logic 48 Postindexed-indirect 194 Preindexed-indirect 194 primary memory 154 printers 311 Program counter (PC) 182 Program loading 209 Program locality principle 432 Programmable logic array (PLA) 164 Programmable logic sequencers 166 Programmed I/O 273 PROM 164 PROM, electrically alterable (EAROM) 164 PROM, erasable 164 PROM, programmer 164 Pseudo-instruction 199 Quine — Mckluskey procedure 673 Random access memory (RAM) 144 Random access memory (RAM), devices 157 Random access memory (RAM), dynamic memory 160 Random access memory (RAM), read/write memory 145 Random access memory (RAM), static RAM 157 Read only memory (ROM) 146 Read only memory (ROM), code converter with 165 Read only memory (ROM), mask-programmed 163 Read only memory (ROM), programmable logic arrays (PLA) 164 Read only memory (ROM), user-programmed (PROM) 163 Read/write memory (RWM) 145 Reduced instruction set computers (RISC) 365 484 Register, bus transfer 124 Register, CLEAR and LOAD with 110 Register, Clearing of 109 Register, HDL constructs 130 Register, HDL operators 128 Register, JK flip-flops used 112 Register, Loading of 109 Register, point to point transfer 124 Register, transfer 120 Register, transfer languages 128 Register, transfer logic of 119 Relative addressing 381 Replacement algorithm 433 437 Reserved opcode method 369 Restoring division algorithm 531 RS-232 interface 308 Scanner 312 Secondary memory devices 154 Secondary storage 154 Segmentation systems 443 Selector channel 302 Semirandom access memory 150 Sequence detector 114 Sequential access memory (SM) 144 168 Sequential circuit 73—142 Sequential circuit, asynchronous 73 Sequential circuit, design with ICs 133 Sequential circuit, synchronous 73 Serial 2's complementer 118 Serial adder 116 serial I/O 306 Serial transfer scheme 120 Set associative cache 435 Set associative mapping 435 Set-reset (SR) flip-flop 76—80 Shared memory system 304 Shift register 113 Sign magnitude representation 646 Signal levels 49 Signetics 74S189 697 SIMD machine 572 573 SISD machine 572 Special outputs 57 Special outputs, buffers 57 Special outputs, tristate 59 Special outputs, wired-or 58 Stack, based ALU 532 Stack, implementation 709 State diagram 92 State table 95 96 State transitions 93 Static RAM 157 Symbol table 203 Symbolic address 198 Symbolic name (mnemonic) 197 Synchronous sequential circuits 73—143 Synchronous sequential circuits, analysis of 92—102 Synchronous sequential circuits, design of 102—107 Terminals 311 Texas Instruments, MSP 430 541 Texas Instruments, TMS 4116 702 Three-address machine 366 Toggle (T) flip-flop 83 Translation lookaside buffer (TLB) 447 Truth tables 15 Two-address machine 367 Two-pass assembler 202 Universal asynchronous receiver transmitter (UART) 309 Vertical (packed) microinstruction 484 Virtual address 441 Virtual memory 441 VME bus 331 Von neumann machine 6 Wider word fetch 392 Write back 440 Write once read many times (WORM) 156 Write through 440 Zero address, instructions 187 Zero address, machine 367
Реклама
|
|
О проекте