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Dally W.J., Poulton J.W. — Digital Systems Engineering (part 2)
Dally W.J., Poulton J.W. — Digital Systems Engineering (part 2)



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Íàçâàíèå: Digital Systems Engineering (part 2)

Àâòîðû: Dally W.J., Poulton J.W.

Àííîòàöèÿ:

What makes some computers slow? What makes some digital systems operate reliably for years while others fail mysteriously every few hours? Why do some systems dissipate kilowatts while others operate off batteries? These questions of speed, reliability, and power are all determined by the system-level electrical design of a digital system. Digital Systems Engineering presents a comprehensive treatment of these topics. It combines a rigorous development of the fundamental principles in each area with down-to-earth examples of circuits and methods that work in practice. The book not only can serve as an undergraduate textbook, filling the gap between circuit design and logic design, but also can help practicing digital designers keep up with the speed and power of modern integrated circuits. The techniques described in this book, which were once used only in supercomputers, are now essential to the correct and efficient operation of any type of digital system.


ßçûê: en

Ðóáðèêà: Òåõíîëîãèÿ/

Ñòàòóñ ïðåäìåòíîãî óêàçàòåëÿ: Ãîòîâ óêàçàòåëü ñ íîìåðàìè ñòðàíèö

ed2k: ed2k stats

Ãîä èçäàíèÿ: 1998

Êîëè÷åñòâî ñòðàíèö: 238

Äîáàâëåíà â êàòàëîã: 16.03.2007

Îïåðàöèè: Ïîëîæèòü íà ïîëêó | Ñêîïèðîâàòü ññûëêó äëÿ ôîðóìà | Ñêîïèðîâàòü ID
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Ïðåäìåòíûé óêàçàòåëü
Packaging, wire bonding      30—31
Pass Gate      166
Periodic signals      see “Timing periodic”
Permittivity      83—84
PFET      153—154
Phase comparator      430—435 615—620
Phase comparator, deadband      634
Phase comparator, exclusive-or      433—434 615—616
Phase comparator, exclusive-or, differential      616
Phase comparator, flip-flop      431—433 617
Phase comparator, flip-flop, cancelling offset      617
Phase comparator, resolving phase ambiguity      432
Phase comparator, sequential      434—435
Phase comparator, sequential, initialization for DLLs      632
Phase modulation      74
Phase noise      609 610
Phase-encoding      414
Phase-locked loop      441—447
Phase-locked loop, clock aligner      635—636
Phase-locked loop, dynamics      444—447
Phase-locked loop, frequency multiplier      613
Phase-locked loop, turbo mode      632—633
Pin diodes      67
Pin-grid array      32—33
Pipeline timing      397 423—424
Plesiochronous      403 463 474—475
Plesiochronous, synchronizer      480—483
Power dissipation      212—213
Power dissipation, source-coupled logic      215
Power dissipation, static CMOS gate      212—214 215
Power distribution      10 221—256
Power distribution, area bonding      242—243
Power distribution, bypass capacitors      see “Bypass capacitor”
Power distribution, clamps      228—229
Power distribution, example      249—255
Power distribution, inductive noise      225—228
Power distribution, isolation      245—246
Power distribution, isolation, between supplies      245—246
Power distribution, isolation, from signals      246—247
Power distribution, local loads      224
Power distribution, logic current profile      237—240
Power distribution, metal migration      243
Power distribution, network      222—228
Power distribution, on-chip      237—245
Power distribution, on-chip bypass capacitors      243—244
Power distribution, resistive noise      240—242
Power distribution, series regulators      230—236
Power distribution, series regulators, linear      231—233
Power distribution, series regulators, switching      see “Switching regulator”
Power distribution, shunt regulators      228—230
Power distribution, signal loads      224—225
Power-delay product      213—215
Power-supply noise      11 262 322—325 343—344
Power-supply noise, supply routing      600—601 see power supply”
Precharged gates      186—190
Printed-circuit board      39—46
Printed-circuit board, assembly      44—46
Printed-circuit board, backplane      48—49
Printed-circuit board, connectors      55—56
Printed-circuit board, construction      40—41
Printed-circuit board, daughter card      48
Printed-circuit board, electrical properties      41—42
Printed-circuit board, flexible      42
Printed-circuit board, manufacturing process      42
Printed-circuit board, mezzanine card      48
Printed-circuit board, soldering      45—46
Printed-circuit board, stackup      44
Printed-circuit board, vias      42—43
Propagation constant      87
Propagation delay      176—178 405
Pseudo-differential signalling      386—387
Pulse generator      456 525
pulse width      401
Pulsed signalling      334—337 350—351
Punchthrough      551
Quad flat pack      32 33
Qualified clock      420—421 580—581
Qualitative circuit analysis      210—212
Quantization jitter      448
Quick-return align block      506—508
Race      493
Race through      583
Radio communication      71—77
Radio communication, antenna gain      73
Radio communication, modulation      74—76
Radio communication, multipath      76—77
Radio communication, power      72—73
Receiver circuits      540—548
Receiver circuits, clocked amplifiers      544
Receiver circuits, combined detection and sampling      541
Receiver circuits, demultiplexing      547—548
Receiver circuits, example      567—571
Receiver circuits, impulse response      445—547
Receiver circuits, integrating amplifier      545
Receiver circuits, retiming      569—571
Receiver circuits, static amplifiers      542—544
Receiver circuits, static amplifiers, inverter      542
Receiver circuits, static amplifiers, source coupled      543—544
Receiver impulse response      545—547
Receiver impulse response, matched filter      546—547
Receiver, integrating      438—439
Receiver, oversampling      547—548
References, capacitive signalling      336—338
References, receiver      320—321
References, transmitter      319
Refresh      185
Regenerative circuits      207—209
Relaxation oscillator      608—609
Rent's rule      19—20
Replica bias      595—600
Replica bias, stability      598—599
Resistance      81—82
Resistance, parasitic      162—163
resistivity      81—82
Resistor, adjustable      517—522 594—596
Resistor, analog adjustment      517—518 594—596
Resistor, automatic adjustment, digital adjustment      518—521
Resistor, automatic adjustment, digital adjustment, binary-weighted      519
Resistor, automatic adjustment, digital adjustment, thermometer coded      519 521
Resistor, MOSFET      203 516—519
Resistor, pass gate      517
Resistor, termination      514—522
Resistors, digital adjustment      204
Return-to-zero signalling      412—413
Ribbon cable      52—53
Ribbon-cable connectors      60—61
Rise time      401
Rise Time, effect on delay      175—177
Rise-time control      339—342 343—344 390 533—536
Rise-time control, RC delay      533—534
Rise-time control, segmented driver      533—534 534—536
Run-length      373
Salphasic clock distribution      452—453
Scaling, integrated-circuit parameters      16—17
Scaling, off-chip communication      19—20
Scaling, on-chip communication      18—19
Scaling, power distribution      18
Scaling, technology      12—21
Scaling, wires      17—20
Scattering matrices      123
Segmenied driver, current mode      533—534
Segmenied driver, voltage mode      534—536
Self-timed design      see “Asynchronous design”
Sensitivity      307 540—542
Series regulators      230—237
Series regulators, linear      231—233
Series regulators, switching      see “Switching regulator”
Series termination      96—97
Set-reset excitation equations      497—498
Setup time      184 407
Shot noise      291—292
Shunt regulators      228—230
Signal encoding, dual-rail      491
Signal energy      345—347 350—351
Signal integrity software      125—126
Signal reiurn      87
Signal transfer function      348—349
Signal-io-noise ratio      296—297
Signalling circuits      514—571
Signalling circuits, example system      559—571
Signalling conventions      6—8 489—492
Signalling conventions, bundled      489
Signalling conventions, four-phase      489
Signalling conventions, two-phase      490
Signalling conventions, weak conditions      490—492
Signalling proiocols      see “Signalling conventions”
Signalling, binary      344—345
Signalling, bipolar      317—319
Signalling, capacitive media      331—337
Signalling, CMOS      7
Signalling, current-mode      7 307 332—333 367—368
Signalling, current-shaping      343—344
Signalling, DC offset      372—373
Signalling, DC-balanced      372—379
Signalling, delay      311—312 351—352
Signalling, detection      320—325
Signalling, differential      328—331 389—390
Signalling, differential, pulsed      382—385 see
Signalling, dual-rail      411—412
Signalling, energy      345—347 350—351
Signalling, example system      559—571
Signalling, hysteresis      347—348
Signalling, levels      347 351—352
Signalling, logic      331—332 382
Signalling, LRC lines, lumped LRC wires      337—338 537
Signalling, lumped media      330—344
Signalling, multi-level      345—347
Signalling, N of M      379—380
Signalling, noise margin      308—309 348—349
Signalling, non-retum-to-zero      412—413
Signalling, offset voltage      318—319
Signalling, on-chip      331—337
Signalling, output impedance      317—318
Signalling, phase encoding      415
Signalling, power dissipation      307—308
Signalling, power supply noise      322—323
Signalling, pseudo-differential      385—386
Signalling, pulsed      334—351 530—531
Signalling, pulsed precharged      536—537
Signalling, RC lines      357—362
Signalling, RC lines, overdrive      361—362
Signalling, RC lines, repeaters      359—361
Signalling, receiver circuits      540—548 see
Signalling, references      319—321 320—321
Signalling, reiurn-io-zero      412
Signalling, rise-time control      339—342 343—344 390—391 533—536
Signalling, simultaneous bidirectional      366—372
Signalling, simultaneous bidirectional, current-mode      367—368
Signalling, simultaneous bidirectional, differential      368—370
Signalling, simultaneous bidirectional, reverse-channel crosstalk      371—372
Signalling, simultaneous bidirectional, use in telephony      367
Signalling, simultaneous bidirectional, voltage mode      370—371
Signalling, simultaneous bidirectional, waveforms      368
Signalling, transfer funciion      348—349
Signalling, transmission line      314—331
Signalling, transmitter modes      315—320 see
Signalling, underterminaied      312 327—328 387—388
Signalling, unipolar      318—320
Signalling, voltage-mode      306 332—333 370—371
Simultaneous bidirectional signalling      366—372 see simultaneous
Skew      262 398—399 403—404
Skew, definition      402
Skew, two-phase clocking      420
Skin effect      103—105
Sockets      46
Sockets, interposer      46
Sockets, zero-insertion-force      46
Solder balls      31—32
soldering      45—46
Source follower      192—193
Source termination      97 324—327
Source-coupled FET logic      205
Source-coupled FET logic, power dissipation      215
Source-coupled FET logic, power-delay product      215
Source-coupled Pair      199
Source-coupled pair, offset voltage      290—291
SPICE, inverter DC transfer characteristic      182
SPICE, inverter transient response      183
SPICE, models      163—166
Stable state      492
standing waves      99—100 452—453
Standing waves, arbitrary waveform      145
State diagrams      492—493
Static amplifier      542—544
Static amplifier, inverter      542
Static amplifier, sensitivity      542
Static amplifier, source coupled      543—544
Static CMOS gate      170—183
Stoppable clocks      487—488
Stoppable clocks, implementation      492—493
Substrate noise      602—603
Subthreshold current      156—157 214—215
Subthreshold current, effect on dynamic circuits      185
Svensson latch      186
Switch networks      166—167
Switch networks, transient response      168—170
Switch-capacitor filter      630—631
Switching regulator      233—236
Switching regulator, buck      233—235
Switching regulator, flyback      235
Switching regulator, inverting      236
Symbiotic bypass capacitors      237 244—245
Synchronization      10 400 462—486
Synchronization, classification      473—475
Synchronization, failure      462—463 468—472
Synchronization, failure, probability      469—470
Synchronization, non-essential      463
Synchronization, periodic      475
Synchronizer      475—486
Synchronizer, asynchronous      466—467
Synchronizer, clock predictor      484
Synchronizer, common errors      471—472
Synchronizer, completion detection      470—471
Synchronizer, delay line      475—477
Synchronizer, dynamics      468—469
Synchronizer, FIFO      477—478 480—481 485—486
Synchronizer, flow control      483
Synchronizer, lime constant      468—469
Synchronizer, mesochronous      475—480
Synchronizer, null symbols      483
Synchronizer, periodic      464—465 483—485
Synchronizer, plesiochronous      480—483
Synchronizer, rate mismatch      480—483
Synchronizer, two-register      476—477
Synchronous logic      406—409
Synchronous timing      396 415—428
Technology scaling      12—21
Telegrapher's equation      95
Telephone subscriber loop      92
Termination      95—99
Termination, adjustable      517—522
Termination, analog adjustment      517—518
Termination, automatic adjustment      519—522
Termination, balanced      111
Termination, circuits      517—522
Termination, digital adjustment      518—521 528—529
Termination, examples      565—566
Termination, frequency-dependent      145—146
Termination, MOSFET      516—519
Termination, non-linear      145
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