This book describes this double gate CMOS technology, from the MOS transistor
to the circuit design. The goal is to give to the reader an overview on the capabilities
offered by this technology.
The first chapter presents a state of the art of device performance required for
future technology nodes. So, we analyze why multiple gates architectures and in
particular double-gate devices appear to be excellent candidates for the sub-32nm
technology nodes.
The physical behavior of double gate MOSFET is more developed in the second
chapter where physical modeling of this device architecture is presented.