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| Patterson D.A., Hennessy J.L. — Computer Organization and Design: The Hardware/Software Interface |
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| Предметный указатель |
Sybase CD8.11:5
Symbol table 108 A12 13
Symmetric multiprocessors (SMPs) CD9.1:6
Synchronization, barrier CD9.3:15
Synchronization, coherency and CD9.3:18—20
Synchronization, defined CD9.1:5
Synchronization, failure B76
Synchronizers В75—77
Synchronous bus 582—583
Synchronous system B48
Synthetic benchmarks CD4.7:1—2 IMD4:11—12
system call 529 A43—45
System CPU time 245
System performance 245
System R CD8.11:4 5
Systems software 11
Tags, cache 475 504
Tail recursion IMD2:10—11
Target language A6
Taylor, George S. CD3.10:8—9
Taylor, Robert CD7.9:9—10
TCP/IP CD8.3:4 CD8.11:7
Temporal locality 468
Terabytes 5
Text segment 87 A13 20
Thacker, Chuck CD7.9:8
Thinking machines CD9.11:52
Thompson, Ken CD7.9:8 11
Thornton, J.E. CD6.13:2
thrashing 537
Thread-level parallelism (TLP) CD9.7:33
Three Cs model 543—545
Throughput 242
Thumb D38—39
Time, definitions of 244
Time-sharing systems CD7.9:7—11
Timing methodologies B72—77
Tomasulo, Robert CD6.13:2 3
Tomasulo’s algorithm CD6.13:2
Torvald, Linus CD7.9:10
Tournament branch predictors 423
Trace cache 349
tracks 569
Traiger, Irving CD8.11:5
Trains, computer controlled 280—281
Transaction processing (TP) 598
Transaction Processing Council (TPC) 598
Transfer time 570
transistors 27 29
Translating microprogram to hardware C27—31
Translation hierarchy for C 106
Translation hierarchy for C, assembler 107—108
Translation hierarchy for C, compiler 107
Translation hierarchy for C, linker 108—111
Translation hierarchy for C, loader 112
Translation hierarchy for Java 114
Translation hierarchy for Java, compiler 114—115
Translation hierarchy for Java, Java Virtual Machine 115
Translation hierarchy for Java, Just in Time compiler 115
Translation-lookaside buffer (TLB) 522—534 CD7.9:5
Transportation, technology and 280—281
Truth tables 302—303 B5 C5 14 15 16
Tucker, Stewart CD5.12:l—2
Turing, Alan CD1.7:3
TVM (transmission voie-machine) 280—281
Two-level logic В10—14
Two’s complement representation 163
Types, checking CD2.12:1
Types, examples of 85
Ullman, Jeff CD2.19:8
Unconditional branches 73
Undefined instruction, exception detection of 343
Underflow 192 CD3.10:5
Unicode 93—94
Uniform memory access (UMA) multiprocessors CD9.1:6 CD9.4:22
Units in the last place (ulp) 215
UNIX, development of CD2.19:7 CD7.9:8—11
UNIX, loader 112
UNIX, object file for 108
Unmapped 536
unresolved references A4
| Unsigned numbers 160—170
Untaken branch hazards 381
UNTVACI (Universal Automatic Computer) CD1.7:4
USB 582 583
Use bit 519
User CPU time 245
Valid bit, cache 476
VAX CD5.12:2—3 CD7.9:9
Vector processing CD9.11:49—51
Vectored interrupts 342
Verilog CD5.8:l—7
Verilog, combinational logic in B23—25
Verilog, data types and operators B21—22
Verilog, description of B20—25
Verilog, MIPS arithmetic logic unit (ALU) B36—38
Verilog, program structure B23
Verilog, sequential logic B55—57
Verilog, used to describe and model a pipeline CD6.7:l—9
Very large scale integrated (VLSIs) circuits 20 27—28 29
Very long instruction word (VLIW) CD6.13:4
VHDL B20 21
Virtual address 512
Virtual machine, simulation of A41—42
Virtual memory, address translation 512 521—524
Virtual memory, defined 511
Virtual memory, design 514—521
Virtual memory, implementing protection with 528—530
Virtual memory, overlays 511—512
Virtual memory, page 512
Virtual memory, page faults 512 514 516—521
Virtual memory, page offset 513 514
Virtual memory, page table 515—516
Virtual memory, page, placing and find 515—516
Virtual memory, reasons for 511—512
Virtual memory, translation-lookaside buffer (TLB) 522—534
Virtual memory, write-backs 521
Virtual page number 513
Virtually addressed cache 527
Volatile memory 23
von Neumann, John 48 CD1.7:l—2 3 CD3.10:l—2 3
Vyssotsky, Victor CD2.19:8
wafers 29—30
Wall-clock time 244
Warp CD6.13:5
Web server benchmarks 599
Weighted arithmetic mean 258
Whetstone synthetic benchmarks CD4.7:l—2 IMD4:11—12
While loop 74—75 98—99
while loop in Java CD2.14:3—4 5—6
Whirlwind project CD1.7:4 CD7.9:1
Wide area networks (WANs) 26 CD8.11:11
WiFi 44—45 CD8.3:8
Wilkes, Maurice CD1.7:2 CD5.12:1 CD7.9:6
Wilkinson, James H. CD3.10:2
Windows 11
Wire B21—22
Wired Equivalent Privacy CD8.3:10
Wireless local area networks (WLANs) CD8.3:8—10
Wireless technology 27 156—157
Wirth, Niklaus CD2.19:6
Wong, Gene CD8.11:5
Word, in MIPS architecture 52
Working set 537
Workload 254
World Wide Web CD8.11:7
Wozniak, Stephen CD1.7:5
Write Buffer 483—484
Write control signal 290 294
Write invalidate CD9.3:14 17
Write-around 484
Write-back 385 392 402 484—485 521 542
Write-through 483 542
Writes, handling cache 483—485
Writes, handling virtual memory 521
Xerox Palo Alto Research Center (PARC) 16 CD1.7:7—8 CD7.9:9—10 CD8.11:7 8
XOR IMD2:21—22
xspim A42 CDA:l—4
Yield 30
ZIP drive 19 20 25
Zone bit recording (ZBR) 569
Zuse, Konrad CD 1.7:3
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