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| Patterson D.A., Hennessy J.L. — Computer Organization and Design: The Hardware/Software Interface |
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| Ïðåäìåòíûé óêàçàòåëü |
Memory, volatile 23
Memory-mapped I/O 589—590
Memory-memory instructions IMD2:8
MESI cache coherency protocol CD9.3:16 18
Message passing CD9.1:6 CD9.4:22—23
Metastability B75—76
MFLOPS (million floating-point operations per second) IMD4:15—17
Microarchitecture 448
Microcode 348
Microinstructions 348—349 CD5.7:1
Microinstructions, fields CD5.7:3 5—9
Microinstructions, format CD5.7:2—4
Microoperations 348
Microprocessors, first CD1.7:5
Microprocessors, future of CD9.10:44—45
Microprogramming, controller 348 CD5.12:2
Microprogramming, creating a program CD5.7:4—10
Microprogramming, defined 330 346
Microprogramming, fallacies and pitfalls 350—352
Microprogramming, historical development of CD5.12:l—4
Microprogramming, implementing the program CD5.7:10—12
Microprogramming, microinstruction format defined CD5.7:2—4
Microprogramming, simplifying design with CD5.7:1—13
Microsoft Corp. CD1.7:5 CD7.9:10 CD8.11:5 6
Minicomputers, first CD 1.7:5
Minterms Â12
mips 49
MIPS (million instructions per second) equation 268
MIPS (million instructions per second) equation, peak versus relative IMD4:13—14
MIPS (million instructions per second) equation, problem with using as a performance measure 268—270
MIPS assembly language, add 49—51
MIPS assembly language, add immediate 58 59
MIPS assembly language, add immediate unsigned 172
MIPS assembly language, add unsigned 172
MIPS assembly language, AND 69 70
MIPS assembly language, and immediate 71 89
MIPS assembly language, conditional and unconditional branches 72—73
MIPS assembly language, divide 188—189
MIPS assembly language, divide unsigned 188—189
MIPS assembly language, floating point 207
MIPS assembly language, jump 73 80
MIPS assembly language, jump address table 76
MIPS assembly language, jump-and-link 79—80
MIPS assembly language, load word 54—59 294
MIPS assembly language, move from hi 181
MIPS assembly language, move from lo 181
MIPS assembly language, multiply 181
MIPS assembly language, multiply unsigned 181
MIPS assembly language, nor (NOR) 69 70
MIPS assembly language, or (OR) 69 70
MIPS assembly language, or immediate 71 89
MIPS assembly language, R2000, addressing modes A45—47
MIPS assembly language, R2000, arithmetic and logical instructions A51—57
MIPS assembly language, R2000, assembler syntax A47—49
MIPS assembly language, R2000, branch instructions A59—63
MIPS assembly language, R2000, comparison instructions A57—59
MIPS assembly language, R2000, constant manipulating instructions A57
MIPS assembly language, R2000, data movement instructions A70—73
MIPS assembly language, R2000, encoding instructions A49
MIPS assembly language, R2000, exception and interrupt instructions A80—81
MIPS assembly language, R2000, floating-point instructions A73—80
MIPS assembly language, R2000, instruction format A49—51
MIPS assembly language, R2000, jump instructions A63—64
MIPS assembly language, R2000, load instructions A66—68
MIPS assembly language, R2000, store instructions A68—70
MIPS assembly language, R2000, trap instructions A64—66
MIPS assembly language, set on less than 75
MIPS assembly language, set on less than immediate 77 165
MIPS assembly language, set on less than immediate unsigned 165
MIPS assembly language, set on less than unsigned 165
MIPS assembly language, shifts 69
MIPS assembly language, store word 54—59 294
MIPS assembly language, subtract 49—51
MIPS assembly language, subtract unsigned 172
MIPS assembly language, summary of 51 59 67 71 77 89 105 169 175 190 207 226—228
MIPS assembly language, xor IMD2:21—22
MIPS, addressing 95—105
MIPS, allocation of memory 87
MIPS, arithmetic logic unit (ALU) B32—38
MIPS, compiling statements into 50—51
MIPS, decision-making instructions 72—73
MIPS, exception code 535
MIPS, fields 63—64
MIPS, floating point 206—213
MIPS, implementation 285—289
MIPS, instruction encoding table 64 103
MIPS, instruction set 49
MIPS, logical operations 68—71
MIPS, machine language, summary of 67 78 90
MIPS, mapping registers into numbers 60—68
MIPS, operands, summary of 59 67 71 89 105 169
MIPS, registers 52—53 79—80 85 88 532
MIPS, RISC core subset D9—16 20—24
MIPS, RISC instructions for MIPS 16 D41—43
MIPS, RISC instructions for MTPS64 D25—27
MIPS, translating assembly into machine language 65—66
Mirroring 575
MISS 470
Miss penalty 471
Miss penalty, reducing, using multilevel caches 505—509
Miss rate/ratio 471
Miss rate/ratio, global 509
Miss rate/ratio, local 509
Misses, Average Memory Access Time (AMAT) IMD7:1
Misses, cache 482—483 496—502
Misses, capacity 543
Misses, cold-start 543
Misses, collision 543
Misses, compulsory 543
Misses, conflict 543
Misses, TBL 531
Mitsubishi, M32R D40—41
Moore machine 338 B68
Moore, Edward 338
Moore, Gordon 28
Moore’s Law 28 181
Mosaic CD8.11:7
Most significant bit 161
motherboard 19 20
Motorola, 68881 CD3.10:8
Motorola, PowrPC D32—33 IMD2:17—20 IMD3:10
Mouse 16—17
move from hi 181
move from lo 181
Move from system control 173
Multicomputers CD9.11:52
Multics (Multiplexed Information and Computing Service) CD7.9:8
Multicycle implementation 318—340
Multiflow Co. CD6.13:4
Multilevel caching 492 505—510
Multimedia extensions of desktop/server RISCs D16—19
Multiple instruction multiple data (MIMD) CD9.11:51—53
Multiple instruction single data (MISD) CD9.11:51
Multiple issue, denned 433
Multiple issue, dynamic 433 442—445
Multiple issue, IBM’s work on CD6.13:4
Multiple issue, static 433 435—442
Multiplexors 286 B9—10
multiplicand 176
Multiplication 176—182
Multiplication, floating point 202—205
Multiplier 176
Multiply 181
multiply unsigned 181
Multiprocessors, connected by a network CD9.4:20—25
Multiprocessors, connected by a single bus CD9.3:ll—20
Multiprocessors, defined CD9.1:4 CD9.11:52
Multiprocessors, future of CD9.10:43—44
Multiprocessors, history development of CD9.11:47—55
Multiprocessors, inside a chip and multithreading CD9.7:30—34
| Multiprocessors, networks CD9.4:20—25 CD9.6:27—30
Multiprocessors, programming CD9.2:8—10
Multiprocessors, types of CD9.1:4—8
Multistage network CD9.6:29—30
Multithreading CD9.7:30—34
Name dependence 439
Nan (not a number) 193
NAND gate B8
NCR CD8.11:6
Negation shortcut 166
Nested procedures 83—85
Netscape CD8.11:7
Network bandwidth, defined CD9.6:27
Network bandwidth, fully connected CD9.6:28
Network bandwidth, total CD9.6:27—28
networks 25—27
Networks, characteristics of CD8.3:1
Networks, crossbar CD9.6:30
Networks, internetworking CD8.3:l—4
Networks, local area CD8.3:5—8
Networks, long-haul CD8.3:5
Networks, multiprocessors connected by CD9.4:20—25 CD9.6:27—30
Networks, multistaged CD9.6:29—30
Networks, Pentium 4 585—587
Networks, wireless local area CD8.3:8—10
news 465
Next-state function 331 B67 C12—13 21—27
No-allocate-on-write 484
No-fetch-on-write 484
Nonblocking assignment B24
Nonblocking caches 445 548
Nonuniform memory access (NUMA) multiprocessors CD9.1:6 CD9.4:22
Nonvolatile memory 23
Nonvolatile storage device 569
Nop 413—414
nor (NOR) 70 301 B8
Normalized number 189
Northrop CD 1.7:4
NOT 70 B6
Numbers, ASCII versus binary 162
Numbers, base to represent 160—161
Numbers, converting binary to decimal 164
Numbers, loads 164
Numbers, negative and positive 165
Numbers, shortcuts 166—168
Numbers, sign and magnitude 162
Numbers, sign bit 163
Numbers, signed and unsigned 160—170
Numbers, two’s complement representation 163
Nygaard, Kristen CD2.19:7
Oak CD2.19:7
Object files, defined 108 A10
Object files, format A13—14
Object files, linking 109—111
Object-oriented language, defined 130 CD2.14:1
Object-oriented language, Javas CD2.14:l—13
Offset 55 56
Opcode 63 303 305 306
Open Source Foundation CD7.9:9
Open Systems Interconnect (OSI) CD8.3:2
Operands, constant or immediate 57
Operands, for computer hardware 52—60
Operands, memory 54—55
Operands, MIPS floating point 207
Operands, MIPS, summary of 59 67 71 89 105 169
Operating systems, examples of 11
Operating systems, functions of 11—12 588—589
Operating systems, historical development of CD7.9:7—11
Operations, for computer hardware 49—52
Operators, Verilog B21—22
Optical disks 25
Optimizations, high-level 116—117
Optimizations, local and global 117—120 CD2.12:3—6
Optimizations, summary of 120—121
or (OR) 70 301 321 B6
or immediate 71
Oracle CD8.11:5
Out-of-order execution 445
output devices 15 A38—40
Output don’t cares B16
Output operation 582
Overflow CD3.10:5
Overflow, adding and subtracting and 171—174
Overflow, division and 189
Overflow, exceptions, detection of 343
Overflow, floating point and 192
Overflow, multiplying and 181
Overlays 511—512
PA-RISC 2.0 D34—36
Packets CD8.3:5
Page 512
page faults 512 514 516—521 531
Page offset 513 514
page table 515—516
Page, placing and find 515—516
Palmer, John E. CD3.10:7
Parallel processing program CD9.1:4 CD9.2:8—10 CD9.4:22—23
Parallel processing program, addressing CD9.4:23—25
Parallel processing program, fallacies and pitfalls CD9.9:39—42
Parity, big-interleaved (RAID 3) 576—577
Parity, block-interleaved (RAID 4) 577—578
Parity, distributed block-interleaved (RAID 5) 578
Parsing CD2.12:1
Pascal CD2.19:6—7
Patterson, David CD8.11:6
PC-relative addressing 98 100
PCSpim A42 CDA:l—3
PCSrc control and signal 305
PCWrite 321
PCWriteCond 321
Peer-to-peer architecture CD8.3:9—10
Pentium 4, buses and networks of 585—587
Pentium 4, implementation of 348—350
Pentium 4, manufacturing of 28—33
Pentium 4, memory hierarchies 546—550
Pentium 4, pipeline 448—450
Pentium processors, SPEC CPU benchmarks 254—255 259—266
Pentium processors, SPECweb99 benchmark 262—266
Performance see also Pipelining
Performance of caches 253
Performance of caches, comparing 252—253 256—259 425—426
Performance of caches, CPU 245 246—253
Performance of caches, defined 241—244
Performance of caches, equation 248—249
Performance of caches, evaluating 254—259
Performance of caches, factors affecting 251
Performance of caches, fallacies and pitfalls 266—270
Performance of caches, historical review CD4.7:l—4
Performance of caches, how hardware and software affect 10
Performance of caches, I/O 597—600
Performance of caches, measuring 244—246
Performance of caches, measuring and improving 492—511
Performance of caches, of the pipeline 253
Performance of caches, per unit cost of technologies 27
Performance of caches, relative 243—244
Performance of caches, reports 255—256
Performance of caches, single-cycle machines and 315—318
Performance of caches, SPEC CPU benchmarks 254—255 259—266 CD4.7:2—3 IMD4:7—8
Performance of caches, SPECweb99 benchmark 262—266
Performance of caches, system 245
Performance of caches, versus power and energy efficiency 263—265
Performance, benchmarks 254—255 IMD4:7—8 11—18
Personal computers, early CD1.7:5—8
Peterman, Mark 366—367
Physical addresses 511 512 513—514
Physical page number 513
Physically addressed cache 528
Pipdining hazards data, denned 376—379
Pipdining hazards data, forwarding 402—412
Pipdining hazards data, load-use 377
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