Currently employed at STMicroelectronics, Transactional-Level Modeling (TLM) puts forward a novel SoC design methodology beyond RTL with measured improvements of productivity and first time silicon success.

The SystemC consortium has published the official TLM development kit in May 2005 to standardize this modeling technique. The library is flexible enough to model components and systems at many different levels of abstractions: from cycle-accurate to untimed models, and from bit-true behavior to floating-point algorithms. However, careful selection of the abstraction level and associated methodology is crucial to ensure practical gains for design teams.