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Stone H.S. — High-performance Computer Architecture
Stone H.S. — High-performance Computer Architecture



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Название: High-performance Computer Architecture

Автор: Stone H.S.

Аннотация:

This book on computer architecture presents design ideas embodied in many high-performance machines and stresses techniques for evaluating them. Stone develops a proper understanding of the design process by treating the various trade-offs that exist in design choices and shows how good designs make efficient use of technology.


Язык: en

Рубрика: Computer science/

Статус предметного указателя: Готов указатель с номерами страниц

ed2k: ed2k stats

Издание: Repr. with corrections

Год издания: 1988

Количество страниц: 424

Добавлена в каталог: 03.02.2015

Операции: Положить на полку | Скопировать ссылку для форума | Скопировать ID
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Предметный указатель
Two-port memory, a memory system that supports a simultaneous READ and WRITE      243
Ullman, J.D.      369
Ultracomputer      see "NYU Ultracomputer"
Underflow, a state in which a nonzero number becomes too small to be represented in a number system      172
Unimodal, having a single mode (maximum or minimum)      366
University of Manchester      25
Unlock, a primitive operation that performs the inverse of a Lock by granting processors access to a critical section      308 318 343 349—353 357 359 378
Varga, R.S.      189 379
Vector arithmetic, arithmetic operations whose operands are vectors of data      234—236
Vector computer, a computer whose instructions include instructions for vector arithmetic      233—374
Vector computer, generic      234—348
Vector instruction, an instruction whose operands are vectors      29 178 234—235 275
Vector processor, a computing device, not necessarily a full computer, capable of operating on vectors as basic data structures      264—266 281
Vector processor, attached to host computer      261—266
Vector processor, data-structuring techniques for      253—261
Vector register, a high-speed register in a vector processor that holds a vector operand      244—245
Vector, a data structure that consists of an ordered set of elements      117
Very large-scale integration      see "VLSI"
Virtual address, the address of an item as produced by a program before the address is mapped into physical (real) memory      70 75—79 81 165—167
Virtual memory, a memory system in which addresses produced by programs lie in an address space that is not the address space of physical (real) memory so that all such addresses must be translated to physical addresses prior to access. In such a system, portions of programs and data can be freely moved among the levels of a hierarchical memory, and brought into physical memory only when actually needed      22 26 28 69—94 96—97 165—168
Virtual memory, buffering effects      90—94
Virtual memory, evaluation of      73
Virtual memory, locality      81—84
Virtual memory, management of      72—73 81
Virtual memory, mapping      74—81
Virtual memory, replacement policy      84—90
VLSI (Very Large-Scale Integration), a manufacturing process that uses a fixed number of manufacturing steps to produce all components and interconnections for hundreds of devices each with millions of transistors      2 6 13—14 20 164 169—170 225 226 228 303
Voldman, J.      58
von Neumann      21 103
von Neumann bottleneck, the notion that the data path between the processor and memory of a von Neumann computer is the facet that most constrains performance of such a computer      21
Vuillemin, J.      225
Wallace, C.C.      171
Waser, S.      172
Weather modeling      12
Weingarten, D.      269
Wilkes, M.V.      29
Window (of working set), the time period during which accesses made by a program determine the contents of its working set      86—87 89
Wolfe, M.J.      375 377
Working set, a model of program behavior that says that the future references made by a program with high probability belong to a set of addresses recently referenced, of      85—87 89—91 96—97
Workload      37 40 73 180
Write-back cache      see "Write-in cache"
Write-in cache, a cache in which WRITEs to memory are stored in cache and written to memory only when a rewritten item is removed from cache      68
Write-through cache, a cache in which WRITEs to memory are recorded concurrently both in cache and in main memory      68
WRITE/READ conflict      113—115 161 376—377 379 382 386 see
WRITE/WRITE conflict      113—115 161 376—377 386 see
Xi-Cheng, L.      283 290
XOR (Exclusive OR operation)      203
Yew, P.C.      315
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