This book constitutes the refereed proceedings of the First International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2005, held in Barcelona in November 2005.

The 17 revised full papers presented together with the abstracts of two keynote talks and 1 invited paper were carefully reviewed and selected from 84 submissions. The papers are organized in topical sections on analysis and evaluation techniques, novel memory and interconnect architectures. security architecture, novel compiler and runtime techniques, and domain specific architectures.